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INTEGRATED CIRCUITS
DATA SHEET
TDA8764A 10-bit high-speed low-power ADC
Product specification File under Integrated Circuits, IC11 2000 Jul 03
Philips Semiconductors
Product specification
10-bit high-speed low-power ADC
FEATURES * 10-bit resolution (binary or gray code) * Sampling rate up to 60 MHz * DC sampling allowed * One clock cycle conversion only * High signal-to-noise ratio over a large analog input frequency range (9.3 effective bits at 5 MHz full-scale input at fclk = 60 MHz) * No missing codes guaranteed * In Range (IR) CMOS output * TTL and CMOS levels compatible digital inputs * 2.7 to 3.6 V CMOS digital outputs * Low-level AC clock input signal allowed * Power dissipation only 312 mW * Low analog input capacitance, no buffer amplifier required * No sample-and-hold circuit required. APPLICATIONS
TDA8764A
High-speed analog-to-digital conversion for: * Video data digitizing * Radar pulse analysis * High energy physics research * Transient signal analysis * modulators * Medical imaging. GENERAL DESCRIPTION The TDA8764A is a 10-bit high-speed low-power Analog-to-Digital Converter (ADC) for professional video and other applications. It converts the analog input signal into 10-bit binary or gray coded digital words at a maximum sampling rate of 60 MHz. All digital inputs and outputs are TTL and CMOS compatible, although a low-level sine wave clock input signal is allowed. The device requires an external source to drive its reference ladder.
ORDERING INFORMATION PACKAGE TYPE NUMBER NAME TDA8764ATS/6 TDA8764AHL/6 SSOP28 LQFP32 DESCRIPTION plastic shrink small outline package; 28 leads; body width 5.3 mm plastic low profile quad flat package; 32 leads; body 5 x 5 x 1.4 mm VERSION SOT341-1 SOT401-1
QUICK REFERENCE DATA SYMBOL VCCA VCCD VCCO ICCA ICCD ICCO INL DNL fclk(max) Ptot PARAMETER analog supply voltage digital supply voltage output stages supply voltage analog supply current digital supply current output stages supply current integral non-linearity differential non-linearity maximum clock frequency total power dissipation CONDITIONS MIN. 4.75 4.75 2.7 - - fclk = 60 MHz; ramp input - fclk = 60 MHz; ramp input - fclk = 60 MHz; ramp input - TDA8764ATS and TDA8764AHL 60 TYP. 5.0 5.0 3.3 29 33 0.5 0.8 0.35 - 312 MAX. 5.25 5.25 3.6 37 40 2.0 2 0.9 - 411 UNIT V V V mA mA mA LSB LSB MHz mW
fclk = 60 MHz; ramp input -
2000 Jul 03
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Philips Semiconductors
Product specification
10-bit high-speed low-power ADC
BLOCK DIAGRAM
TDA8764A
handbook, full pagewidth
VCCA 3 (7)
CLK 1 (5)
VCCD
OE
GRAY
11 (17) 10 15 (21) (16) (6) 2
CLOCK DRIVER 9 (15)
TC
VRT
(31) 25 (30) 24 (29) 23 analog VI 8 (14) voltage input VRM 7 (13) RLAD (28) 22 ANALOG-TO-DIGITAL CONVERTER (27) 21 LATCHES CMOS OUTPUTS (26) 20 (25) 19 (24) 18 (23) 17 (22) 16 VRB 6 (12) CMOS OUTPUT (19) 13
D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
MSB
data outputs
LSB
VCCO (2) 26
TDA8764A
4 (8) AGND 12 (18) DGND
IN-RANGE LATCH 5, 27, 28 (9, 1, 3, 4, 10, 11, 32) n.c.
IR output
14 (20) OGND
FCE253
The pin numbers given in parenthesis refer to the TDA8764AHL.
Fig.1 Block diagram.
2000 Jul 03
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Philips Semiconductors
Product specification
10-bit high-speed low-power ADC
PINNING PIN SYMBOL TDA8764ATS CLK TC VCCA AGND n.c. VRB VRM VI VRT OE VCCD DGND VCCO OGND GRAY D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 IR n.c. n.c. n.c. n.c. n.c. n.c. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 - - - - TDA8764AHL 5 6 7 8 9 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 2 1 3 4 10 11 32 clock input twos complement input (active LOW) analog supply voltage (5 V) analog ground not connected reference voltage BOTTOM input reference voltage MIDDLE input analog input voltage reference voltage TOP input output enable input (active LOW) digital supply voltage (5 V) digital ground supply voltage for output stages (2.7 to 3.6 V) output ground gray code input (active HIGH) data output; bit 0 (LSB) data output; bit 1 data output; bit 2 data output; bit 3 data output; bit 4 data output; bit 5 data output; bit 6 data output; bit 7 data output; bit 8 data output; bit 9 (MSB) in range data output not connected not connected not connected not connected not connected not connected DESCRIPTION
TDA8764A
2000 Jul 03
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Philips Semiconductors
Product specification
10-bit high-speed low-power ADC
TDA8764A
handbook, halfpage
CLK TC VCCA AGND n.c. VRB VRM VI VRT
1 2 3 4 5 6 7
28 n.c. 27 n.c. 26 IR 25 D9 24 D8 23 D7 22 D6
TDA8764ATS
8 9 21 D5 20 D4 19 D3 18 D2 17 D1 16 D0 15 GRAY
FCE254
OE 10 V CCD DGND 11 12
V CCO 13 OGND 14
Fig.2 Pin configuration (SSOP28).
32 n.c.
30 D8
29 D7
27 D5
31 D9
28 D6
26 D4
handbook, full pagewidth
n.c. IR n.c. n.c. CLK TC VCCA AGND
25 D3
1 2 3 4 5 6 7 8
24 D2 23 D1 22 D0 21 GRAY
TDA8764AHL
20 OGND 19 VCCO 18 DGND 17 VCCD
n.c. 10
n.c. 11
VRB 12
VRM 13
VI 14
VRT 15
n.c. 9
OE 16
FCE255
Fig.3 Pin configuration (LQFP32).
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Philips Semiconductors
Product specification
10-bit high-speed low-power ADC
LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134). SYMBOL VCCA VCCD VCCO VCC PARAMETER analog supply voltage digital supply voltage output stages supply voltage supply voltage difference between VCCA - VCCD VCCA - VCCO VCCD - VCCO VI Vi(sw)(p-p) IO Tstg Tamb Tj Note input voltage output current storage temperature ambient temperature junction temperature referenced to AGND AC input voltage for switching (peak-to-peak value) referenced to DGND -1.0 -1.0 -1.0 -0.3 - - -55 -40 - CONDITIONS note 1 note 1 note 1 MIN. -0.3 -0.3 -0.3
TDA8764A
MAX. +7.0 +7.0 +7.0 +1.0 +4.0 +4.0 +7.0 VCCD 10 +150 +85 150 V V V V V V V V
UNIT
mA C C C
1. The supply voltages VCCA, VCCD and VCCO may have any value between -0.3 and +7.0 V provided that the supply voltage differences VCC are respected. HANDLING Inputs and outputs are protected against electrostatic discharges in normal handling. However, to be totally safe, it is desirable to take normal precautions appropriate to handling integrated circuits. THERMAL CHARACTERISTICS SYMBOL Rth(j-a) SSOP28 LQFP32 PARAMETER thermal resistance from junction to ambient CONDITIONS in free air 110 90 K/W K/W VALUE UNIT
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Philips Semiconductors
Product specification
10-bit high-speed low-power ADC
TDA8764A
CHARACTERISTICS VCCA = 4.75 to 5.25 V; VCCD = 4.75 to 5.25 V; VCCO = 2.7 to 3.6 V; AGND and DGND shorted together; Tamb = 0 to 70 C; typical values measured at VCCA = VCCD = 5 V; VCCO = 3.3 V; VRB = 1.3 V; VRT = 3.7 V; CL = 10 pF and Tamb = 25 C; unless otherwise specified. SYMBOL Supplies VCCA VCCD VCCO VCC analog supply voltage digital supply voltage output stages supply voltage supply voltage difference between VCCA - VCCD VCCA - VCCO VCCD - VCCO ICCA ICCD ICCO Inputs PIN CLK (REFERENCED TO DGND); note 1 VIL VIH IIL IIH Ci VIL VIH IIL IIH IIL IIH Yi LOW-level input voltage HIGH-level input voltage LOW-level input current HIGH-level input current input capacitance VCLK = 0.8 V VCLK = 2 V 0 2 -1 - - 0 2 VIL = 0.8 V VIH = 2 V VI = VRB = 1.3 V VI = VRT = 3.7 V fi = 5 MHz; note 2 - 3 45 5 - 7 k pF -1 - - - - - 0 2 2 - - - - 0 55 0.8 VCCD +1 10 - 0.8 VCCD - 1 - - V V A A pF analog supply current digital supply current output stages supply current fclk = 60 MHz; ramp input -0.20 -0.20 -0.20 - - - - - - 29 33 0.5 +0.20 +2.55 +2.55 37 40 2.0 V V V mA mA mA 4.75 4.75 2.7 5.0 5.0 3.3 5.25 5.25 3.6 V V V PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
PINS OE; TC AND GRAY (REFERENCED TO DGND); see Tables 3 and 4 LOW-level input voltage HIGH-level input voltage LOW-level input current HIGH-level input current V V A A A A
PIN VI (ANALOG INPUT VOLTAGE REFERENCED TO AGND) LOW-level input current HIGH-level input current input admittance Ri input resistance Ci input capacitance
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Philips Semiconductors
Product specification
10-bit high-speed low-power ADC
TDA8764A
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Reference voltages for the resistor ladder; see Table 1 VRB VRT Vdiff(ref) Iref RLAD TCRLAD Voffset(B) Voffset(T) VI(p-p) Outputs PINS D9 TO D0 AND IR (REFERENCED TO OGND) VOL VOH IOZ LOW-level output voltage HIGH-level output voltage output current in 3-state mode IOL = 1 mA IOH = -1 mA 0.5 V < VO < VCCO 0 -20 - - 0.5 VCCO +20 V V A VCCO - 0.5 - reference voltage BOTTOM reference voltage TOP differential reference voltage VRT - VRB reference current resistor ladder temperature coefficient of the resistor ladder offset voltage BOTTOM offset voltage TOP analog input voltage (peak-to-peak value) Vdiff = 2.4 V; note 3 Vdiff = 2.4 V; note 3 Vdiff = 2.4 V; note 4 Vdiff = 2.4 V 1.2 3.4 2.2 - - - - - - 1.95 1.3 3.7 2.4 17.6 136 1860 253 200 190 2.01 2.2 VCCA - 0.8 3.2 - - - - - - 2.10 V V V mA ppm m/K mV mV V
Switching characteristics PIN CLK; see Fig.5; note 1 fclk(max) tCPH tCPL maximum clock frequency clock pulse width HIGH clock pulse width LOW Tamb = 25 C Tamb = 25 C 60 7.0 3.5 - - - - - - MHz ns ns
Analog signal processing LINEARITY INL DNL Eoffset EG integral non-linearity differential non-linearity offset error fclk = 60 MHz; ramp input - 0.8 0.35 1 0.5 2 0.9 - - LSB LSB LSB % fclk = 60 MHz; ramp input; - no missing code middle code - -
gain error (from device to device) note 5
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Philips Semiconductors
Product specification
10-bit high-speed low-power ADC
TDA8764A
SYMBOL
PARAMETER
CONDITIONS - - -
MIN.
TYP. - - -
MAX.
UNIT
BANDWIDTH (fCLK = 60 MHZ) B analog bandwidth full-scale sine wave; note 6 75% full-scale sine wave; note 6 small signal at mid-scale; VI = 10 LSB at code 512; note 6 tstLH tstHL analog input settling time LOW-to-HIGH analog input settling time HIGH-to-LOW full-scale square wave; see Fig.7; note 7 full-scale square wave; see Fig.7; note 7 30 45 700 MHz MHz MHz
- -
5 5
- -
ns ns
HARMONICS (fCLK = 60 MHZ) Hall(FS) harmonics (full-scale); all components second harmonic third harmonic SFDR THD spurious free dynamic range total harmonic distortion fi = 5 MHz fi = 5 MHz fi = 15 MHz SIGNAL-TO-NOISE RATIO; note 8 SNRFS signal-to-noise ratio (full-scale) without harmonics; fclk = 60 MHz; fi = 5 MHz - 58 57 - - dB dB fi = 5 MHz - - - - - -68 -67 72 -64 -57 - - - - - dB dB dB dB dB
without harmonics; 53 fclk = 60 MHz; fi = 15 MHz EFFECTIVE BITS; note 8 EB effective bits fclk = 60 MHz fi = 5 MHz fi = 10 MHz fi = 15 MHz fi = 20 MHz TWO-TONE; note 9 TTID two-tone intermodulation distortion fclk = 60 MHz - - - - -
9.3 8.9 8.8 8.6 -67
- - - - -
bits bits bits bits
dB
BIT ERROR RATE BER bit error rate fclk = 60 MHz; fi = 5 MHz; - VI = 16 LSB at code 512 10-13 - times/ sample
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Philips Semiconductors
Product specification
10-bit high-speed low-power ADC
TDA8764A
SYMBOL
PARAMETER
CONDITIONS - 4 VCCO = 2.7 V VCCO = 3.3 V VCCO = 2.7 V VCCO = 3.3 V - - - - - VCCO = 2.7 V
MIN.
TYP.
MAX.
UNIT
Timing (fclk = 60 MHz; CL = 10 pF); see Fig.5 and note 10 tds th td td CL SR sampling delay time output hold time output delay time TDA8764ATS output delay time TDA8764AHL digital output load capacitance slew rate 0.7 - 10 9 13 12 - 0.3 2 - 14 13 17 16 10 - ns ns ns ns ns ns pF V/ns
0.2 - - - -
3-state output delay times (fclk = 60 MHz); see Fig.6 tdZH tdZL tdHZ tdLZ Notes 1. The rise and fall times of the clock signal must not be less than 0.5 ns. enable HIGH enable LOW disable HIGH disable LOW VCCO = 3.3 V VCCO = 3.3 V VCCO = 3.3 V VCCO = 3.3 V 16 30 25 23 20 34 30 27 ns ns ns ns
1 2. The input admittance is Y i = ---- + jCi Ri 3. Analog input voltages producing code 0 up to and including code 1023: a) Voffset(B) (offset voltage BOTTOM) is the difference between the analog input which produces data equal to 00 and the reference voltage BOTTOM (VRB) at Tamb = 25 C. b) Voffset(T) (offset voltage TOP) is the difference between VRT (reference voltage TOP) and the analog input which produces data outputs equal to code 1023 at Tamb = 25 C. 4. In order to ensure the optimum linearity performance of such converter architecture the lower and upper extremities of the converter reference resistor ladder (corresponding to output codes 0 and 1023 respectively) are connected to pins VRB and VRT via offset resistors ROB and ROT as shown in Fig.4. V RT - V RB a) The current flowing into the resistor ladder is I L = ----------------------------------------- and the full-scale input range at the converter, R OB + R L + R OT RL to cover code 0 to 1023, is V I = R L x I L = ----------------------------------------- x ( V RT - V RB ) = 0. 8375 x ( V RT - V RB ) R OB + R L + R OT b) Since RL, ROB and ROT have similar behaviour with respect to process and temperature variation, the ratio RL ----------------------------------------- will be kept reasonably constant from device to device. Consequently variation of the output R OB + R L + R OT codes at a given input voltage depends mainly on the difference VRT - VRB and its variation with temperature and supply voltage. When several ADCs are connected in parallel and fed with the same reference source, the matching between each of them is then optimized. 5. ( V 1023 - V 0 ) - V i(p-p) E G = ---------------------------------------------------- x 100 V i(p-p)
6. The analog bandwidth is defined as the maximum input sine wave frequency which can be applied to the device. No glitches greater than 2 LSBs, nor any significant attenuation are observed in the reconstructed signal. 2000 Jul 03 10
Philips Semiconductors
Product specification
10-bit high-speed low-power ADC
TDA8764A
7. The analog input settling time is the minimum time required for the input signal to be stabilized after a sharp full-scale input (square wave signal) in order to sample the signal and obtain correct output data. 8. Effective bits are obtained via a Fast Fourier Transform (FFT) treatment taking 8K acquisition points per equivalent fundamental period. The calculation takes into account all harmonics and noise up to half of the clock frequency (Nyquist frequency). Conversion to signal-to-noise ratio: S/N = EB x 6.02 + 1.76 dB. 9. Intermodulation measured relative to either tone with analog input frequencies of 4.5 and 4.3 MHz. The two input signals have the same amplitude and the total amplitude of both signals provides full-scale to the converter. 10. Output data acquisition: the output data is available after the maximum delay time of td. It is recommended to have the lowest possible output load. These parameters are guaranteed by characterization and not by production test.
handbook, halfpage
VRT ROT RL VRM RLAD IL code 0 ROB VRB
FCE256
code 1023
Fig.4 Explanation of note 4.
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Philips Semiconductors
Product specification
10-bit high-speed low-power ADC
Table 1
TDA8764A
Output coding and input voltage (typical values; referenced to AGND; VRB = 1.3 V; VRT = 3.7 V; binary/gray codes BINARY OUTPUT BITS GRAY OUTPUT BITS VI <1.5 1.5 : : : : 3.51 >3.51 IR D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 0 1 1 : : 1 1 0 0 0 0 : : 1 1 1 0 0 0 : : 1 1 1 0 0 0 : : 1 1 1 0 0 0 : : 1 1 1 0 0 0 : : 1 1 1 0 0 0 : : 1 1 1 0 0 0 : : 1 1 1 0 0 0 : : 1 1 1 0 0 0 : : 1 1 1 0 0 1 : : 0 1 1 0 0 0 : : 1 1 1 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 1 : : 1 0 0
STEP U/F 0 1 : : 1022 1023 O/F Table 2 STEP U/F 0 1 : : 1022 1023 O/F Table 3 TC X 0 1 Table 4
Output coding and input voltage (typical values; referenced to AGND; binary/twos complement codes BINARY OUTPUT BITS VI <1.5 1.5 : : : : 3.51 >3.51 IR D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 0 1 1 : : 1 1 0 0 0 0 : : 1 1 1 0 0 0 : : 1 1 1 0 0 0 : : 1 1 1 0 0 0 : : 1 1 1 0 0 0 : : 1 1 1 0 0 0 : : 1 1 1 0 0 0 : : 1 1 1 0 0 0 : : 1 1 1 0 0 0 : : 1 1 1 0 0 1 : : 0 1 1 1 1 1 : : 0 0 0 0 0 0 : : 1 1 1 0 0 0 : : 1 1 1 0 0 0 : : 1 1 1 0 0 0 : : 1 1 1 0 0 0 : : 1 1 1 0 0 0 : : 1 1 1 0 0 0 : : 1 1 1 0 0 0 : : 1 1 1 0 0 1 : : 0 1 1 TWOS COMPLEMENT OUTPUT BITS
TC mode selection OE 1 0 0 Gray mode selection OE 1 0 0 active; binary active; gray D9 to D0 high-impedance high-impedance active active IR D9 to D0 high-impedance active; twos complement active; binary high-impedance active active IR
GRAY X 0 1
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Philips Semiconductors
Product specification
10-bit high-speed low-power ADC
TDA8764A
handbook, full pagewidth
t CPL t CPH VIH CLK 50% VIL sample N sample N + 1 sample N + 2
Vl
t ds DATA D0 to D9 DATA N-2 DATA N-1 td
th HIGH DATA N DATA N+1
FCE257
50% LOW
Fig.5 Timing diagram.
handbook, full pagewidth
VCCD OE 50%
tdHZ HIGH 90% output data LOW tdLZ HIGH 50% output data HIGH LOW 10% tdZL
tdZH
50% LOW
TEST VCCD 3.3 k S1 tdLZ tdZL tdHZ 10 pF OE tdZH
S1 VCCD VCCD DGND DGND
FCE258
TDA8764A
fOE = 100 kHz.
Fig.6 Timing diagram and test conditions of 3-state output delay time.
2000 Jul 03
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Philips Semiconductors
Product specification
10-bit high-speed low-power ADC
TDA8764A
handbook, full pagewidth
t stLH code 1023 VI code 0 2 ns 50%
t stHL
50%
2 ns
CLK
50%
50%
0.5 ns
0.5 ns
FCE259
Fig.7 Analog input settling-time diagram.
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Philips Semiconductors
Product specification
10-bit high-speed low-power ADC
INTERNAL PIN CONFIGURATIONS
TDA8764A
handbook, halfpage
VCCO
handbook, halfpage
V CCA
D9 to D0 IR
VI
OGND
FCE260
AGND
FCE261
Fig.8 CMOS data and in range outputs.
Fig.9 Analog input.
handbook, halfpage handbook, halfpage
VCCA
VCCO VRT VRM OE R LAD
TC GRAY
VRB
OGND AGND
FCE262 FCE263
Fig.10 OE, GRAY and TC inputs.
Fig.11 VRB, VRM and VRT inputs.
2000 Jul 03
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Philips Semiconductors
Product specification
10-bit high-speed low-power ADC
TDA8764A
handbook, halfpage
VCCD
CLK
1.5V
DGND
FCE264
Fig.12 CLK input.
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Philips Semiconductors
Product specification
10-bit high-speed low-power ADC
APPLICATION INFORMATION
TDA8764A
handbook, halfpage
33 CLK
(3)
1
28
n.c. n.c.
TC VCCA 100 nF
(2)
2
27
3
26
IR
AGND
4
25
D9
n.c. V RB(1) 100 nF AGND VI 100 nF AGND 100 nF OE AGND V CCD 100 nF
(2)
5
24
D8
6
23 D7 D6
V RM (1)
7
22
TDA8764ATS
8 21 D5
V RT (1)
9
20
D4
10
19
D3
11
18
D2
DGND V CCO 100 nF
(2)
12
17
D1
13
16
D0 GRAY
OGND
14
15
FCE265
The analog and digital supplies should be separated and well decoupled. An application note is available and describes the design and the realization of a demoboard that uses TDA8764ATS with an application environment. (1) VRB, VRM and VRT are decoupled to AGND. (2) Decoupling capacitor for supplies must be placed close to the device. (3) This resistor is mandatory (33 is its minimum value) and must be near the clock source.
Fig.13 Application diagram (SSOP28).
2000 Jul 03
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Philips Semiconductors
Product specification
10-bit high-speed low-power ADC
TDA8764A
handbook, full pagewidth
n.c. 32 n.c. IR n.c. n.c. 33 CLK
(3)
D9 31
D8 30
D7 29
D6 28
D5 27
D4 26
D3 25 24 23 22 21 D2 D1 D0 GRAY OGND
(2)
1 2 3 4
TDA8764AHL
5 6 7 8 9 n.c. 10 n.c. 11 n.c.
(1)
20 19 18 17 12 VRB 13 VRM
(1)
TC VCCA
(2)
VCCO DGND
100 nF
(2)
100 nF
AGND
VCCD
100 nF
14 VI
15 VRT
(1)
16 OE
FCE266
100 nF AGND
100 nF AGND
100 nF AGND
The analog and digital supplies should be separated and well decoupled. An application note is available and describes the design and the realization of a demoboard that uses TDA8764AHL with an application environment. (1) VRB, VRM and VRT are decoupled to AGND. (2) Decoupling capacitor for supplies must be placed close to the device. (3) This resistor is mandatory (33 is its minimum value) and must be near the clock source.
Fig.14 Application diagram (LQFP32).
2000 Jul 03
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Philips Semiconductors
Product specification
10-bit high-speed low-power ADC
PACKAGE OUTLINES SSOP28: plastic shrink small outline package; 28 leads; body width 5.3 mm
TDA8764A
SOT341-1
D
E
A X
c y HE vMA
Z 28 15
Q A2 pin 1 index A1 (A 3) Lp L 1 e bp 14 wM detail X A
0
2.5 scale
5 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A max. 2.0 A1 0.21 0.05 A2 1.80 1.65 A3 0.25 bp 0.38 0.25 c 0.20 0.09 D (1) 10.4 10.0 E (1) 5.4 5.2 e 0.65 HE 7.9 7.6 L 1.25 Lp 1.03 0.63 Q 0.9 0.7 v 0.2 w 0.13 y 0.1 Z (1) 1.1 0.7 8 0o
o
Note 1. Plastic or metal protrusions of 0.20 mm maximum per side are not included. OUTLINE VERSION SOT341-1 REFERENCES IEC JEDEC MO-150 EIAJ EUROPEAN PROJECTION
ISSUE DATE 95-02-04 99-12-27
2000 Jul 03
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Philips Semiconductors
Product specification
10-bit high-speed low-power ADC
TDA8764A
LQFP32: plastic low profile quad flat package; 32 leads; body 5 x 5 x 1.4 mm
SOT401-1
c y X
24 25
17 16 ZE
A
e E HE wM bp 32 1 8 9 L detail X Lp A A2 A1 pin 1 index (A 3)
e bp D HD
ZD wM B
vM A
vM B
0
2.5 scale
5 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A max. 1.60 A1 0.15 0.05 A2 1.5 1.3 A3 0.25 bp 0.27 0.17 c 0.18 0.12 D (1) 5.1 4.9 E (1) 5.1 4.9 e 0.5 HD 7.15 6.85 HE 7.15 6.85 L 1.0 Lp 0.75 0.45 v 0.2 w 0.12 y 0.1 Z D (1) Z E (1) 0.95 0.55 0.95 0.55 7 0o
o
Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT401-1 REFERENCES IEC 136E01 JEDEC MS-026 EIAJ EUROPEAN PROJECTION
ISSUE DATE 99-12-27 00-01-19
2000 Jul 03
20
Philips Semiconductors
Product specification
10-bit high-speed low-power ADC
SOLDERING Introduction to soldering surface mount packages This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our "Data Handbook IC26; Integrated Circuit Packages" (document order number 9398 652 90011). There is no soldering method that is ideal for all surface mount IC packages. Wave soldering is not always suitable for surface mount ICs, or for printed-circuit boards with high population densities. In these situations reflow soldering is often used. Reflow soldering Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. Several methods exist for reflowing; for example, infrared/convection heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. Typical reflow peak temperatures range from 215 to 250 C. The top-surface temperature of the packages should preferable be kept below 230 C. Wave soldering Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. To overcome these problems the double-wave soldering method was specifically developed. If wave soldering is used the following conditions must be observed for optimal results:
TDA8764A
* Use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. * For packages with leads on two sides and a pitch (e): - larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; - smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves at the downstream end. * For packages with leads on four sides, the footprint must be placed at a 45 angle to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Typical dwell time is 4 seconds at 250 C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. Manual soldering Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 C.
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21
Philips Semiconductors
Product specification
10-bit high-speed low-power ADC
Suitability of surface mount IC packages for wave and reflow soldering methods
TDA8764A
SOLDERING METHOD PACKAGE WAVE BGA, LFBGA, SQFP, TFBGA HBCC, HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, SMS PLCC(3), SO, SOJ LQFP, QFP, TQFP SSOP, TSSOP, VSO Notes 1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the "Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods". 2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink (at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version). 3. If wave soldering is considered, then the package must be placed at a 45 angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners. 4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. not suitable not not not suitable(2) recommended(3)(4) recommended(5) suitable REFLOW(1) suitable suitable suitable suitable suitable
2000 Jul 03
22
Philips Semiconductors
Product specification
10-bit high-speed low-power ADC
DATA SHEET STATUS DATA SHEET STATUS Objective specification PRODUCT STATUS Development DEFINITIONS (1)
TDA8764A
This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product.
Preliminary specification
Qualification
Product specification
Production
Note 1. Please consult the most recently issued data sheet before initiating or completing a design. DEFINITIONS Short-form specification The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. DISCLAIMERS Life support applications These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.
2000 Jul 03
23
Philips Semiconductors - a worldwide company
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For all other countries apply to: Philips Semiconductors, Marketing Communications, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825 (c) Philips Electronics N.V. 2000
Internet: http://www.semiconductors.philips.com
SCA 70
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
613502/01/pp24
Date of release: 2000
Jul 03
Document order number:
9397 750 06996

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